This article sheds light on the issue of the MP Effect (MPE) and the role of the SRM constant. While it’s certainly not exhaustive, nor oriented toward the computer designer, it should be helpful to those engaged in trying to make sense of their own configurations and performance data.
The MPE Overview
The basic functions of a computing system involve taking data from a storage area (i.e., memory) and transferring it to the CPU for action. In addition, data also may be taken from sources external to the system; these are commonly called Input/Output (I/O) operations. Numerous steps, such as high-speed caches, branch prediction and translation lookaside, have been taken to improve these actions. In each case, the point has been to minimize delays that might be experienced by the CPU while waiting for the arrival of data from memory. Obvious improvements entail retaining information in higherspeed memories or caches (to increase speed in the event the data was reused) and to increase the bandwidth for transferring information from memory.
At some point, we begin to lose the ability to significantly improve the speed of a single processor, and given the fact there are typically multiple units of work competing, the logical solution is to provide more processors. This effectively allows more units of work to execute simultaneously, and increases the throughput and apparent speed of the machine.
The drawback to multiple processors is the necessity of having to coordinate storage accesses. With multiple processors, the possibility of simultaneous actions occurring that could be detrimental to data integrity is so fundamental that a mechanism to ensure serialized access is required. In addition, it becomes necessary to coordinate data access with other processors because they may contain data we’re interested in within their own high-speed caches.
In these situations, there’s a necessity to integrate the design advantages of speed and reuse for memory, and correspondingly, the necessity of paying the overhead cost of coordinating with other processors.
This overhead cost is commonly referred to as the “MP Effect.” As the number of processors increases, the corresponding overhead increases non-linearly. This effect can become significant in today’s configurations, which allow up to 32 processors to be consolidated into a single system image.
SRM Constant Overview
Seemingly unrelated, the SRM constant is used to normalize the service “charged” to a unit of work to make it independent of time. The service policy definitions and performance decisions shouldn’t have to be re-evaluated every time the processor configuration changes. In particular, the SRM constant, for a particular processor, is multiplied by the service time (in seconds), which should result in a service consumption value that’s relatively uniform across different processor models and configurations.
For example, on a 2084-302, the SRM constant is about 20752 Service Units (SU)/sec. On the 2084-323, the SRM constant is 14171 SU/sec. By using this value on a unit of work running in each environment that consumes one second of CPU time, the service units charged would be 20752 and 14171, respectively.