Operating Systems

• Where the return value must reside

• How the stack elements are arranged

• How much stack space must be allocated for a function.

The RTL data structure itself is a per-function, double-linked list of socalled insns. An insn has a type that indicates it actually describes code to be generated (sequence insn, call insn, and jump insn), or that it holds information important for optimization or code generation (barrier, code label, and note). An insn actually describing code consists of data structures pointing to each other, forming an RTL Expression (RTX). The textual representation of an RTX follows the LISP-like syntax. An arithmetic expression such as a + b will be written as (plus a b).

Human-Readable Intermediate Representations

For GCC development, it’s essential to know how a program being compiled looks after certain passes in the compiler. Even if you don’t intend on doing compiler development, it’s helpful to learn more about what GCC is doing with your favorite source code. GCC provides a family of -fdump- <name> options for printing the intermediate representation after pass <name> into a text file that can be read with an arbitrary text editor. The GCC manual provides details of all available options. Some options have an abbreviated form. For example, specifying -da dumps every possible intermediate RTL-based file resulting in about 60 files at -O3.

The following examines a few of the important passes working on the RTL representation of the code:

Instruction Scheduler

Processors have a complex internal structure that provides different functional units and register sets. To generate fast code, these things must be taken into account when generating code. The purpose of an instruction scheduler is to rearrange the instructions to make ideal use of the machinespecific facilities.

There are two major factors that might delay execution of an instruction. Either there’s a data dependency, which means the result from the last instruction isn’t yet available, or the functional unit of the processor is still busy executing one of the last instructions.

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