Operating Systems

The CPU Measurement Facility (CPU MF), the hardware support for collecting information about how the software and hardware interact on your system, is an important feature introduced with the System z10. Supporting CPU MF is a new z/OS component, Hardware Instrumentation Services (HIS). This article describes how data available from the CPU MF and HIS can provide insight into software and hardware interaction on your processors.

CPU MF: Sampling Hardware and Software Data

CPU MF enables the collection of counters that provide insight into software and hardware interaction on your z10, z196, and z114 processors. The facility can also collect instruction samples that contain all the information needed to determine the address space and address where the sampled instruction is running. The sample also contains information about the home address space and unit of work under which the code is running and a signal that represents the frequency with which the instruction was executed. This sampling runs with little overhead.

HIS: Capturing Hardware Events

HIS captures the CPU MF data and makes it available to z/OS systems programmers. Using HIS, you can capture COUNTER data indicating the frequencies of various hardware events such as cycles, instructions, and cache misses. This information provides a unique view of the cache/memory characteristics of z10 and z196 processors. You can use it to supplement traditional performance metrics to help understand why performance changed. It can provide insights into workload and hardware interaction and, using a new Relative Nest Intensity (RNI) metric, can provide a “hint” to help select the best workload from the latest Large Systems Performance Reference (LSPR) for capacity sizing.

Using HIS, you can capture instruction samples and information about the location of modules on your system. With COUNTER and SAMPLING data and proper tools support, you can determine what executable code is consuming the most CPU time and how frequently it’s called.

HIS COUNTER Data and Its Benefits

One of CPU MF modes, “COUNTERS,” counts events; the counts contribute to unique metrics useful for performance and capacity analysts. The key insight the counts provide is interpretation of z10 and z196 cache/memory characteristics, which isn’t provided in traditional Systems Management Facilities (SMF) records, including those cut for Resource Measurement Facility (RMF).

Basic counters count cycles, instructions, and level 1 misses and cycles when instructions aren’t in the processor level 1 cache. Also, information in extended counters indicates the source of the miss when it did miss the level 1 cache. On a z10 machine, it could be sourced from level 1.5 private, level 2 local, level 2 remote, or memory. For z196 processors, there’s an additional cache level, and the miss can be sourced from level 2, level 3, level 4 local, level 4 remote, or memory. Sourcing means the instructions and data must be retrieved from the appropriate level to ensure integrity for the cache coherency model.

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